Complimentary MOS (CMOS) inverter circuits are extremely well understood within the prior art. FIG. 1A shows a classic CMOS inverter 10. Here, an n-channel transistor 12 and a p-channel transistor 11 are coupled in series between a positive supply potential (e.g., V.sub.CC) and ground (e.g., V.sub.SS). Together, transistors 11 and 12 form each other's load resistors. When the input V.sub.IN is low, p-channel device 11 is ON and n-channel device 12 is OFF. The output node 13 sees a low resistance to V.sub.CC.
If there is no load on the output, there is no supply current needed. When the input is high, p-channel device 11 is OFF and the n-channel transistor 12 is ON. For this situation, the output sees a low resistance to ground. Again, no supply current is needed. The only time circuit 10 requires supply current is when the input state is changed because it takes some energy to charge the gate capacitance. In addition, both transistors are partially ON during the transition between logic states.
FIG. 1B shows the transfer function of CMOS inverter 10. The output V.sub.OUT changes state exactly half-way between the two extremes of the power supply (V.sub.CC) and ground (V.sub.SS); slicing things right down the middle. Note that transfer function 14 illustrates a rapid voltage change about the switching threshold. For many applications this is a desirable characteristic. For example, this type of transfer function gives the best possible noise immunity, both to supply-line and ground-line noise.
In the field of linear analog circuits a frequent requirement is to have an amplifier with a linear inverting transfer function. A common implementation of this type of circuit is shown in FIG. 2. As can be seen, the circuit of FIG. 2 uses an operational amplifier 18 configured with feedback resistors 17 and 19 such that the output voltage V.sub.0 is given by EQU V.sub.0 =-V.sub.IN
However, the circuit of FIG. 2 has a number of drawbacks that make the task of integrating this circuit into CMOS VLSI circuits very difficult. Operational amplifier 18 requires a large number of very carefully sized transistors which consume valuable silicon area. In addition, the design of a wide bandwidth, stable operational amplifier with a low closed loop gain is a very complex task. Moreover, the above implementation requires the use of two resistors. In modern CMOS VLSI processes, the availability of reasonable-valued resistors is often very limited.
The present invention offers a solution to these problems by providing a unity gain inverting amplifier having linear transfer characteristics. The invented amplifier is well-suited for use with mixed signal analog/digital VLSI circuits. The present invention is further characterized by a low component count and a gain which is stable across a wide bandwidth range.